1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology, and more particularly, to a buffer control circuit capable of controlling an activation operation of a buffer and a multi-chip package including the buffer control circuit.
2. Description of the Related Art
Multi-chip package technology, where plurality of semiconductor chips are included in a single package, is classified into Single Die Packages (SDP), Double Die Packages (DDP) and Quad Die Packages (QDP) based on the number of memory chips included in the package.
A fuse cutting scheme is used to determine whether the package will operate as an SDP, DDP or QDP. The fuse cutting scheme also determines whether a buffer coupled with each memory chip is activated. The buffer is included in each memory chip and transmits an enabling signal of a circuit operation block for operating the memory chip. Therefore the activation of the buffer during fuse cutting is what determines whether its corresponding memory chip will be enabled.
Once the multi-chip package is set to SDP, DDP or QDP, it is difficult to change. For example, in a QDP, four buffers corresponding to four memory chips are activated. The QDP semiconductor memory device activates the four buffers based on QDP information, which select which fuses to cut, and a buffer activation signal for activating the buffers transferred from an external device. To go from QDP to DDP or SDP, buffers would need to be disabled. However, cutting fuses is permanent and difficult to reverse. Therefore, it is difficult to change from one type of multi-chip package technology to another after the initial fuse cutting has been completed.